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hhp3
Добавлен 31 дек 2006
For many years I was in the Department of Computer Science at Portland State University. I have an Sc.B. from Brown University and a Ph.D. from the Oregon Graduate Institute.
When not trying to figure out how my computer actually works, I like to ski, hike, travel, and spend time with my sons building things.
When not trying to figure out how my computer actually works, I like to ski, hike, travel, and spend time with my sons building things.
EveCore 25/25: Design Decisions, Lessons, Mistakes
Microcontroller ISA Design Choices: Some lessons learned. What I did right and what I did wrong.
Просмотров: 14
Видео
EveCore 24/25: Project Ideas + Future Work
Просмотров 16Час назад
EveCore Microcontroller - Project ideas for you; future work on the core.
EveCore 22/25: ISA - Long Version
Просмотров 9328 дней назад
The Instruction Set Architecture. Same material from video 22/24, but in more detail. Also includes more detailed walkthrough of the echo.s example.
EveCore 23/25: ALU Module - More Detail
Просмотров 9528 дней назад
The Arithmetic Logic Unit. Same material as video 5/24, but in more detail, especially the testbench code.
EveCore 21/25: ISA - Short Version
Просмотров 2528 дней назад
The Instruction Set Architecture, including instruction encoding.
EveCore 18/25: Instructions - part 5
Просмотров 1428 дней назад
The Verilog code for CALL and RET instructions.
EveCore 20/25: Multiply Example
Просмотров 3328 дней назад
Description of the algorithm for binary multiplication and an EveCore assembly.
EveCore 14/25: Instructions - part 1
Просмотров 3928 дней назад
The Verilog code for CMP, LDSP, and ADD16 instructions.
EveCore 17/25: Instructions - part 4
Просмотров 2128 дней назад
The Verilog code for GOTOXY, conditional BRANCH, and NOP instructions.
EveCore 19/25: Instructions - part 6
Просмотров 1328 дней назад
The Verilog code for IN and OUT instructions, along with I/O interfacing.
EveCore 16/25: Instructions - part 3
Просмотров 1428 дней назад
The Verilog code for LDCODE, PUSH, and POP instructions.
EveCore 15/25: Instructions - part 2
Просмотров 1228 дней назад
The Verilog code for LD, ST, LDM, and STM instructions.
EveCore 13/25: The First Program
Просмотров 1528 дней назад
Single-stepping through MOV, MOVI, and ALU instructions, including FPGA demo.
EveCore 12/25: Instruction Fetch and Execute
Просмотров 1628 дней назад
How the FSM fetches and executes instructions.
EveCore 11/25: Finite State Machine
Просмотров 2928 дней назад
How the Finite State Machine (FSM) works and is implemented in Verilog.
EveCore 9/25: Debugging Output Module
Просмотров 2028 дней назад
EveCore 9/25: Debugging Output Module
EveCore 8/25: Instruction Decoder Module
Просмотров 2428 дней назад
EveCore 8/25: Instruction Decoder Module
EveCore 3/25: Assembly Example and Demo
Просмотров 8228 дней назад
EveCore 3/25: Assembly Example and Demo
EveCore 2/25: Instruction Set Architecture
Просмотров 7228 дней назад
EveCore 2/25: Instruction Set Architecture
EveCore 1/25: Introduction and Overview
Просмотров 18128 дней назад
EveCore 1/25: Introduction and Overview
Verilog, FPGA, Serial Com: Overview + Example
Просмотров 8 тыс.Год назад
Verilog, FPGA, Serial Com: Overview Example
xv6 Kernel-37: File-Related System Calls-Part 2
Просмотров 838Год назад
xv6 Kernel-37: File-Related System Calls-Part 2
xv6 Kernel-36: File-Related System Calls-Part 1
Просмотров 1,5 тыс.Год назад
xv6 Kernel-36: File-Related System Calls-Part 1
WoW! Great video, nice to see you upload!
the paper representation works pretty well, it’s very easy to follow your explanations. thank you for this!
Dear professor, thank you for this incredible video, just what I need to pass my Comp Arch exam in 7 hours.
Best of luck!
I don't quite get why guard page is needed at all. Why not just mark text pages with "executable, but not readable and not writable" flags ?
This video is FANTASTIC! Thank you, this helped me think more clearly about the construction of AST’s for my computer algebra system.
you're so creative when it comes to examples !! Thanks !
When I was earning my master's degree, I heard a lot about finite state machines (FSMs), but it was all theory - like clouds in the sky: there's a lot of water, but you can't drink it. I toiled for three months after graduating until I implemented my first FSM in code in 1981. Now, there is a programming methodology based on this concept - v-agent oriented programming (VAOP) - with many examples of its implementation. It's best to start learning about VAOP with this article on Medium: "Bagels and Muffins of Programming or How Easy It Is to Convert a Bagel into a Black Hole". With VAOP, you can implement FSM in any programming language.
very useful! thank you so much
This assembler syntax reminds me of AT&T's DSP16xx series of DSP's, something I haven't seen adopted anywhere except here. The thoughtful syntax makes assembler programming so much more understandable with no loss in functionality. As an example of DSP16 DSP assembler (executes in 1 cycle optionally in a zero cycle loop): a0=p p=x*y x=*pt++ y=*r0++
This looks spicy as heck
Just ran across this... But, in a very high-level sense, this sort of sounds similar to something like an 8080 or similar. Not much particularly useful to comment here (and not much immediate use-case for doing an 8-bit core). I had designed and implemented a CPU core in Verilog (with a custom ISA), but mine ended up very different (64-bit LIW/VLIW with 64 GPRs; no dedicated FPRs), and generally requires a bigger FPGA (a mostly feature-complete version fits into an XC7A100T). Previously, I had experimented smaller ISA's, but going smaller it is harder to make a case of "why not just use RISC-V?..." On a bigger FPGA, it is possible to get better performance-per-clock, by around 30% it seems, but this is harder to pull off within the limits of a smaller FPGA. Technically, my current core can also run RV64G (or, more correctly, RV64imfd; the A and Ziscr extensions are incomplete, but also not emitted by GCC). There are differences at the ISA level, but the design of the pipeline was such that most things be glossed over in the instruction decoder. System-level features differ a fair bit though (somewhat different interrupt-handling and MMU design). One drawback is that I am running my own OS (of sorts) on it, and debugging is a pain. Much more time spent debugging stuff than adding new features. Most recent things were things like an ELF-loader to allow running RV64 binaries in user-mode; and trying to debug the virtual memory system (to try to reduce the amount of crashing). For my own ISA, I have my own C compiler, and am using a modified version of PE/COFF for the binaries. Nothing intended for serious use, still mostly a hobby project at this stage.
❤
🎯 Key points for quick navigation: Turing machines lack built-in mechanisms to detect the left end of the tape, but this limitation can be overcome by shifting the input and introducing a special symbol, such as the dollar sign, to mark the left end. Programming Turing machines involves progressively detailing implementation, akin to moving from high-level programming languages to machine code in traditional computing. Turing machines can utilize subroutines, allowing one machine to perform a task that another machine incorporates into a larger computation. Techniques like symbol marking enable complex tasks such as string comparison without altering the original data, expanding the versatility of Turing machines in problem-solving. Made with HARPA AI
Excelente explicacion. Muy buen video.
Thank you for all your efforts. A quick question regarding __sync_synchronize(). What triggers compiler optimisation? Developer expectation from main.c is that processor runs in the exact same order.
sscratch is the best variable name :D
Sale consumption harvesting of alcohol cigarette meat vehicle railway airforce coastal adultery prosthetic egg milk products deforestation is death warrant pass agriculture or heart attack
Very good video. Very good explanation!! Me and my coleggue we are creating a project named Minishell and its very similar to that :)
I used this approach and it worked for the bonus
*standing ovation*
Wish that more videos with examples from you.
Octal is used in Linux to set file and directory permissions: 1 = x, 2 = w, 4 = r; 6 = 4+2 = rw; 7 = 4+2+1 = rwx.
I've never heard of a half-word, I see 16-bit integers in Linux called characters, and in Windows called words. Windows still denotes 32-bit integers as dwords, as evident in the registry. C++ and C# represent dwords as 32-bit integers
i was so cooked until i saw this video thank you so much
Thank you
Hi Professor, Your xv6 video lectures have been brilliant and helped me understand the operating system at a much deeper level. Would it be possible for you to also release the drawings/notes that you used in the videos? Any format like PDF or PPT would be greatly appreciated. Having access to those supplementary materials would further enhance my learning experience.
Hi Professor, Your xv6 video lectures have been brilliant and helped me understand the operating system at a much deeper level. Would it be possible for you to also release the drawings/notes that you used in the videos? Any format like PDF or PPT would be greatly appreciated. Having access to those supplementary materials would further enhance my learning experience.
Hi Professor, Your xv6 video lectures have been brilliant and helped me understand the operating system at a much deeper level. Would it be possible for you to also release the drawings/notes that you used in the videos? Any format like PDF or PPT would be greatly appreciated. Having access to those supplementary materials would further enhance my learning experience.
Hi Professor, Your xv6 video lectures have been brilliant and helped me understand the operating system at a much deeper level. Would it be possible for you to also release the drawings/notes that you used in the videos? Any format like PDF or PPT would be greatly appreciated. Having access to those supplementary materials would further enhance my learning experience.
Hi Professor, Your xv6 video lectures have been brilliant and helped me understand the operating system at a much deeper level. Would it be possible for you to also release the drawings/notes that you used in the videos? Any format like PDF or PPT would be greatly appreciated. Having access to those supplementary materials would further enhance my learning experience.
Hi Professor, Your xv6 video lectures have been brilliant and helped me understand the operating system at a much deeper level. Would it be possible for you to also release the drawings/notes that you used in the videos? Any format like PDF or PPT would be greatly appreciated. Having access to those supplementary materials would further enhance my learning experience.
Hi Professor, Your xv6 video lectures have been brilliant and helped me understand the operating system at a much deeper level. Would it be possible for you to also release the drawings/notes that you used in the videos? Any format like PDF or PPT would be greatly appreciated. Having access to those supplementary materials would further enhance my learning experience.
Hi Professor, Your xv6 video lectures have been brilliant and helped me understand the operating system at a much deeper level. Would it be possible for you to also release the drawings/notes that you used in the videos? Any format like PDF or PPT would be greatly appreciated. Having access to those supplementary materials would further enhance my learning experience.
Hi Professor, Your xv6 video lectures have been brilliant and helped me understand the operating system at a much deeper level. Would it be possible for you to also release the drawings/notes that you used in the videos? Any format like PDF or PPT would be greatly appreciated. Having access to those supplementary materials would further enhance my learning experience.
Hi Professor, Your xv6 video lectures have been brilliant and helped me understand the operating system at a much deeper level. Would it be possible for you to also release the drawings/notes that you used in the videos? Any format like PDF or PPT would be greatly appreciated. Having access to those supplementary materials would further enhance my learning experience.
Obrigado. Os conceitos e fundamentos explicados nesse video facilita o entendimento sobre FPGA.
What are the reasons for L1 cache is faster than L2 cache ?
Why L1 , L2 and L3 caches have different sizes and how sizes of caches are determined ?
Why only we have two different cache for data and instruction for L1, but not for L1 and L3 ?
So, why can not we make main memory faster, we can eliminate the need for cache.
awesome
Thank you. I really appreciate the pauses between descriptions. It gives me a chance to absorb it. I'm in Uni and just got to this and I have not a single clue of what they are on about. This is just so, soooo much clearer. Thanks
Hi, do you have slides or pdf version of your manuscript? I really want to get it printed.
Future reference: If you're gonna illustrate something with a colored graph or map, use blue and black or blue and red or something, not red and green. Red/green colorblindness is the most common form and affects around 5% of the population (including me). It is basically impossible to distinguish the difference between files and directories in that map you drew. I love these videos, tho. You're doing a fantastic job explaining this stuff. I'm currently gearing up to start dabbling in OS / Kernel development and I didn't even know about these xv# series of OSs that MIT produced until I found these videos. I'll likely use them as a basis for some of my experimenting before I start in on writing one of my own from scratch. Probably try to implement some other OS features with this as a base.
you probably already had the idea but you can try an utility that shift the hue of the screen
lol just wanted to write a comment about that too. I was so surprised when he said he used different colors for his tree and I couldn't see any of them :D
Thank you a lot. Your video is the first of many others that talked about incorrect associativity
Your handwriting is exactly, precisely like mine. It's kinda scary. I've written a bunch of these, too. Not in pen, though.
very good explanation! a lot less complicated than my professor !
This video series is amazing. Makes the xv6 book even better Thank you sir.
Wow, this is brilliant! It starts to feel like programming with higher-order functions
Never seen such a great and emphasizing video before. Keep goin! Loved it!
you definetly live up to your name, professor. This video feels like magic. 😂 Thank you for this great lecture.